xans/HybridMultislopeDelSig
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add initial prototype

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xansmolzy
2024-09-09 00:32:19 +02:00
parent 217ced55a6
commit 8f4269945e
31 changed files with 0 additions and 0 deletions
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Hardware/Gerbers/xMultislope-1v0-NPTH-drl_map.gbr Normal file
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M30

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{
"Header": {
"GenerationSoftware": {
"Vendor": "KiCad",
"Application": "Pcbnew",
"Version": "8.0.5-8.0.5-0~ubuntu24.04.1"
},
"CreationDate": "2024-09-09T00:24:46+02:00"
},
"GeneralSpecs": {
"ProjectId": {
"Name": "xMultislope-1v0",
"GUID": "784d756c-7469-4736-9c6f-70652d317630",
"Revision": "rev?"
},
"Size": {
"X": 114.5,
"Y": 66.609
},
"LayerNumber": 2,
"BoardThickness": 1.6,
"Finish": "None"
},
"DesignRules": [
{
"Layers": "Outer",
"PadToPad": 0.2,
"PadToTrack": 0.2,
"TrackToTrack": 0.2,
"MinLineWidth": 0.2,
"TrackToRegion": 0.2,
"RegionToRegion": 0.2
}
],
"FilesAttributes": [
{
"Path": "xMultislope-1v0-F_Cu.gbr",
"FileFunction": "Copper,L1,Top",
"FilePolarity": "Positive"
},
{
"Path": "xMultislope-1v0-B_Cu.gbr",
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"FilePolarity": "Positive"
},
{
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},
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},
{
"Path": "xMultislope-1v0-B_Silkscreen.gbr",
"FileFunction": "Legend,Bot",
"FilePolarity": "Positive"
},
{
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},
{
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"MaterialStackup": [
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{
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"Name": "Top Solder Paste"
},
{
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{
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"Thickness": 0.035,
"Name": "F.Cu"
},
{
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"Thickness": 1.51,
"Material": "FR4",
"Name": "F.Cu/B.Cu",
"Notes": "Type: dielectric layer 1 (from F.Cu to B.Cu)"
},
{
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"Name": "B.Cu"
},
{
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}